1. The University of Cincinnati's free VHDL 93 Analyzer This is the analyzer and intermediate representation for a free VHDL simulation system from the University of Cincinnati's Experimental Computation Laboratory. "scram", SAVANT's analyzer, converts VHDL into the AIRE intermediate standard form. AIRE is designed to be extensible by the user so that they can easily insert their own back ends. SAVANT includes a VHDLpublishing back end and a C++ publishing back end. The generated C++ can be compiled and linked against the TyVis library to allow end to end sequential or parallel simulation of VHDL. This version of the Debian package supports only sequential simulation - future releases should support parallel simulation as well. From Debian 3.0r0 APT