1. Part of the PentiumŪ 4 processor\'s IntelŪ NetBurstŪ micro-architecture. Improved branch prediction algorithm accelerates the flow of work to the processor and helps overcome the deeper pipeline. Very deep, out-of-order speculative execution allows the processor to view 126 instructions in flight and handle up to 48 loads and 24 stores in the pipeline. A 4 KB branch target buffer stores more detail on the history of past branches, reducing inaccurate branch predictions by roughly 33% (when compared to P6 micro-architecture).